Coldfire instruction set

 

 

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Download ColdFire Family Programmer`s Reference Manual · 1 Data Registers (D0–D7) These registers are for bit, byte (8 bits), word (16 bits), and longword (32MCF5282 Coldfire Microcontroller User's Manual, Rev. 2.3. Freescale Semiconductor v. Contents. Paragraph. Number. Title. Page. Number. Chapter 1. Overview. All ColdFire cores (V1, V2, V3, and V4) share the same architecture and instruction set. Upward compatibility from V1 to V2, V3, and. In the instruction set definitions, the CCR is illustrated as follows: Figure 1-1. ColdFire Family User Programming Model. In the instruction set definitions, the CCR is illustrated as follows: Figure 1-1. ColdFire Family User Programming Model. ColdFire Instruction Set and Processor Cross-Reference. FPU: Original ColdFire instruction set architecture for floating-point unit (FPU). Revision B of the ColdFire instruction set architecture (ISA_B) providing new instructions to improve performance and code density. Although the ColdFire architecture is closely related to the 680x0, there are many simplifications to the instruction set. Nearly all of the differences are Instruction Set Summary. Integer User Instructions. MAC User Instructions. EMAC User Instructions. FPU User Instructions. Supervisor Instructions.

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